Silicon Laboratories SI5324 Guía de usuario descargar pdf (Pagina 22)

22 www.xilinx.com AC701 Evaluation Board

UG952 (v1.1) January 30, 2013

Chapter 1: AC701 Evaluation Board Features

System Clock Source

[Figure 1-2, callout 6]

The AC701 board has a 2.5V LVDS differential 200 MHz oscillator (U51) soldered onto the

back side of the board and wired to an FPGA MRCC clock input on bank 34. This 200

MHz

signal pair is named SYSCLK_P and SYSCLK_N, which are connected to FPGA U1 pins R3

and P3 respectively.

• Oscillator: Si Time SiT9102AI-243N25E200.00000 (200 MHz)

• PPM frequency jitter: 50 ppm

• Differential Output

For more details, see the Si Time SiT9102 data sheet http://www.sitime.com. The system

clock circuit is shown in Figure 1-10.

X-Ref Target - Figure 1-10

Figure 1-10: System Clock Source

UG952_c1_10_100212

GND

VCC2V5

SIT9102

200 MHz

Oscillator

GND

VCC

OUT_B

OUT

U51

R166

100Ω 1%

SYSCLK_P

SYSCLK_N

C30

0.1 μF 10V

X5R

1 2 ... 17 18 19 20 21 22 23 24 25 26 27 ... 106 107

Sin comentarios

Silicon Laboratories SI5324 Guía de usuario Pagina 22